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ISBN: 9789048181087

Until the 1990s, the reduction of the minimum feature sizes used to fabricate in- grated circuits, called "scaling", has highlighted serious advantages as integration density, s… mais…

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Planar Double-Gate Transistor From technology to circuit - Rozeau, Olivier (Herausgeber); Amara, Amara (Herausgeber)
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Planar Double-Gate Transistor From technology to circuit - Livro de bolso

2010, ISBN: 9048181089

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Rozeau, Olivier (Herausgeber); Amara, Amara (Herausgeber):
Planar Double-Gate Transistor From technology to circuit - Livro de bolso

2010

ISBN: 9048181089

Edição encadernada

Softcover reprint of hardcover 1st ed. 2009 Kartoniert / Broschiert Spektroskopie, Spektrochemie, Massenspektrometrie, Technische Anwendung von elektronischen, magnetischen, optischen M… mais…

Custos de envio:Versandkostenfrei innerhalb der BRD. (EUR 0.00) MARZIES.de Buch- und Medienhandel, 14621 Schönwalde-Glien
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Amara Amara:
Planar Double-Gate Transistor - Livro de bolso

ISBN: 9789048181087

Paperback, [PU: Springer], Until the 1990s, the reduction of the minimum feature sizes used to fabricate in- grated circuits, called "scaling", has highlighted serious advantages as integ… mais…

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Planar Double-Gate Transistor - Livro de bolso

2009, ISBN: 9048181089

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Planar Double-Gate Transistor: From technology to circuit

This book on Double-Gates devices and circuit is unique and aims to reinforce the synergy between the research activities on CMOS sub-32nm devices and the design of elementary cells. The goal is to point out how we can take advantage of new transistor structures to come up with new basic cells and concepts that exploit the electrical features of these new devices and the breakthrough they bring.Planar Double-Gate Transistor will mainly focus on SOI CMOS transistors, fully depleted with double independent planar Gates (Independent Planar Double Gates Transistors: IPDGT), a potential candidate for the sub-32 nm technological nodes as planned by the current ITRS Roadmap.

Dados detalhados do livro - Planar Double-Gate Transistor: From technology to circuit


EAN (ISBN-13): 9789048181087
ISBN (ISBN-10): 9048181089
Livro de capa dura
Livro de bolso
Ano de publicação: 2010
Editor/Editora: Springer
220 Páginas
Peso: 0,339 kg
Língua: eng/Englisch

Livro na base de dados desde 2011-09-23T04:14:23-03:00 (Sao Paulo)
Página de detalhes modificada pela última vez em 2024-04-15T08:00:01-03:00 (Sao Paulo)
Número ISBN/EAN: 9789048181087

Número ISBN - Ortografia alternativa:
90-481-8108-9, 978-90-481-8108-7
Ortografia alternativa e termos de pesquisa relacionados:
Autor do livro: olivier, roze
Título do livro: gate, double, transistor circuit


Dados da editora

Autor: Amara Amara; Olivier Rozeau
Título: Planar Double-Gate Transistor - From technology to circuit
Editora: Springer; Springer Netherland
211 Páginas
Ano de publicação: 2010-10-19
Dordrecht; NL
Impresso / Feito em
Língua: Inglês
160,49 € (DE)
164,99 € (AT)
177,00 CHF (CH)
POD
VIII, 211 p.

BC; Hardcover, Softcover / Technik/Elektronik, Elektrotechnik, Nachrichtentechnik; Schaltkreise und Komponenten (Bauteile); Verstehen; CMOS; Circuit Design; Compact modelling; Double-Gate MOSFET; Fully Depleted Silicon On Insulator; Leistungsfeldeffekttransistor; analog circuit design; analog design; digital design; field-effect transistor; integrated circuit; metal oxide semiconductur f; Electronic Circuits and Systems; Condensed Matter Physics; Spectroscopy; Optical Materials; Physik der kondensierten Materie (Flüssigkeits- und Festkörperphysik); Spektroskopie, Spektrochemie, Massenspektrometrie; Technische Anwendung von elektronischen, magnetischen, optischen Materialien; BB; EA

This book on Double-Gates devices and circuit is unique and aims to reinforce the synergy between the research activities on CMOS sub-32nm devices and the design of elementary cells. The goal is to point out how we can take advantage of new transistor structures to come up with new basic cells and concepts that exploit the electrical features of these new devices and the breakthrough they bring. Planar Double-Gate Transistor will mainly focus on SOI CMOS transistors, fully depleted with double independent planar Gates (Independent Planar Double Gates Transistors: IPDGT), a potential candidate for the sub-32 nm technological nodes as planned by the current ITRS Roadmap. The book topics are mainly focusing on: Detailed description of specific processes that allow the optimization of the CMOS IPDGT device CMOS IPDGT modeling, both compact and physical models are presented Device characterization Design of innovating cells (SRAM cells, basic digital & analog functions) with the objectives to improve the level of integration and the robustness to variability as well as the power consumption optimization, using the degree of freedom introduced by the independent gates.
First book dealing with Technology and Design Interaction Presents a cross-disciplinary based approach to optimize a new and complex technology Covers all aspects of IC Design with advanced technologies: process, device modelling, characterization, and circuit design of analogue, digital and memory circuits Introduces new circuit concepts taking benefit of the double-gate device structures

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